South Korean AI chip startup Rebellions has partnered with ADTechnology, Samsung Foundry and Arm to build chiplet-based data center AI accelerator products. Rebellions will integrate its forthcoming chiplet-based AI accelerator, Rebel, with ADTechnology's Arm-based CPU chiplet.
The ADTechnology CPU chiplet is based on Arm Neoverse compute subsystems V3. ADTechnology will design and implement the CPU chiplet on Samsung 2 nm.
Rebellions is already part of the Arm ecosystem, Rebellions CTO Jinwook Oh told EE Times. "We already have Arm IP [in existing chips]," he said. "Arm has helped us a lot with the Atom project."
The ease of emulating Arm CPU IP for validation and software stack development was another reason to choose Arm, Oh said.
Third generation
Rebellions, founded in 2020, has two generations of its chips already on the market.
The company's first-generation chip, Ion, is aimed at low-latency inference for the financial trading segment. It has a single instance of Rebellions' CGRA-like accelerator, offering 4 TFLOPS of FP16 compute, implemented in TSMC 7 nm.
Rebellions' second-generation chip, Atom, was designed as a power-efficient inference engine for the data center. Atom is on the market today, offered as cards, servers or rack-scale systems.
Developed before the explosion in LLM popularity, Atom uses GDDR6 external memory but can nevertheless be used to serve power-efficient LLM inference, Oh said.
"Atom is actively being used for computer vision and LLMs," he said, noting that a 7B LLM can be spread across eight cards to provide 40 tokens per second per user (1,000 to 2,000 tokens per second total throughput). "We are working on another card with four Atom chips on one card so we can build denser, more compute-capable servers for customers."
Oh said Atom customers, mainly Korean telcos, CSPs, enterprises and the Korean public sector, are using it for custom RAG, agentic AI and chatbots.
Each Atom chip has eight neural engines offering 32-TFLOPS FP16 compute with 64-MB SRAM. The neural engines are arranged in two clusters, each with a local network-on-chip and L1 cache. Atom can be configured to consume 75 to 130 W (equivalent to 0.5 INT8 TOPS/W).
Chiplet-based
Rebellions' third-generation product is a chiplet-based data center accelerator designed for LLM inference at scale. The four-chiplet configuration of Rebel, with its 144 GB of HBM3e, will offer 1-POPS FP16 compute in a 300-W power envelope. The chiplets will use UCIe-Advanced for fast, power-efficient data transfer.
"[Rebel] will not outperform [Nvidia] B200," Oh said. "But it will have better energy efficiency."
Future generations of Rebel will use a yet-to-be-developed I/O chiplet for added scalability and a Rebellions-designed CPU chiplet alongside the accelerator chiplets. Oh said that different configurations (different combinations of chiplets) would be available to customers.
Neural engine
Rebellions' NPU architecture and software stack is used in all generations of its product. The NPU's programmable dataflow architecture uses instruction-level and data-level parallelism. There is also a task manager, which handles scheduling and task-level parallelism, and a DMA engine.
The version of Rebellions' core going into Rebel is similar to previous generations, Oh said.
"We used the same neural engine that we have developed over the last few years, but because in the LLM era you need new precision support, we took that into consideration when building the chip," he said.
Other changes from Atom include increased scalability (by adding UCIe) and ensuring the architecture is perfectly balanced to handle the high speeds of HBM.
"UCIe means we are not limited to four or a certain number of chips," Oh said. "We also want to maximize the capability of UCIe, so we added another controller on top of the UCIe controller to support fast LLM acceleration."
Rebel is built by Samsung Foundry's service team with Samsung HBM, Oh confirmed.
Sapeon merger
Rebellions is in the process of merging with another Korean chip startup, Sapeon, which was spun off from SK Telecom's internal R&D business in 2016. The merged entity will continue under Rebellions CEO Sunghun Park and will keep the Rebellions name.
"Manpower is very important," Oh said. "Especially in Korea, it's hard to get qualified and experienced engineers in this domain. Sapeon is a similar size to us and has good experience on the business side, so we can double the size of our engineering and business teams."
Each company has a little over 100 employees, so the size of the combined entity will be more than 200 people.
The merger also means Rebellions can be part of SK Telecom's telecom-industry-wide AI initiatives.
"[SK Telecom] is leading the world in the telco business on AI enablement, and we can be part of that effort," Oh said. "International telco companies want to utilize AI for their applications, and SK is leading, and we will be part of that effort. Thanks to them, we started collaborations with big companies in the AI domain that span from algorithm to system, interface and IP companies."
Sapeon had launched its second-generation chip, the data center inference accelerator X330, almost a year ago. The X330 offered 367-TFLOPS FP8 performance in a 120-W power envelope including RISC-V control CPUs and an on-chip video codec accelerator. It used GDDR memory. Sapeon had commercialized single- and double-chip cards and was also offering IP, chips, cards and servers.
Oh confirmed that the merged entity will focus on Rebellions' technology roadmap going forward.
"We already stopped the Sapeon product line," he said. "It's challenging for a startup to have two product lines, so we decided to focus on what we have and put all the resources together for one project."